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121 Hardware/software co-design of power level difference based noise cancellation

International Conference on Advanced Technologies for Communications

Dang Q.H.; Nguyen D.M.; Ha V.P.; Volume 2016-January, 2016, Pages 616-621
122 Hardware implementation of cyclic codes error correction on FPGA

NICS 2016 - Proceedings of 2016 3rd National Foundation for Science and Technology Development Conference on Information and Computer Science

Phan T.-T.-D.; Dao V.-L.; Nguyen V.-T.; 2016, Pages 97-100
123 FPGA implementation of real-time growcut based object segmentation for chroma-key effect

2015 International Conference on Computing, Management and Telecommunications, ComManTel 2015

Vinh T.Q.; Cuong T.V.; 2016, Pages 52-56
124 FPGA design and implementation of the detector for the MIMO-SDM system using PNC

2016 IEEE 6th International Conference on Communications and Electronics, IEEE ICCE 2016

Ngo V.-D.; Le M.-T.; Tran X.-N.; Vu D.-H.; Le D.-T.; 2016, Pages 205-210
125 Dynamic mapping of quality adjustable applications on NoC-based reconfigurable platforms

International Conference on Advanced Technologies for Communications

Nam P.N.; Tuyen L.D.; Bang N.T.; Van Cuong N.; 2016, Pages 322-327
126 Development of a Three-to-Five-Phase Indirect Matrix Converter with Carrier-Based PWM Based on Space-Vector Modulation Analysis

IEEE Transactions on Industrial Electronics

Lee H.-H.; Nguyen T.D.; Volume 63, Issue 1, 2016, Pages 13-24
127 Design of real-time advanced lens free imager

ACM International Conference Proceeding Series

Nakajo H.; Kitagawa N.; Ohshima K.; Ryuchi T.; Yashiro M.; Umeno K.; Suzuki R.; Takemoto M.; Volume 08-09-December-2016, 2016, Pages 411-416
128 Design of a low latency network interface using dual buffer for network on chip

2015 International Conference on Computing, Management and Telecommunications, ComManTel 2015

Nam P.N.; Cuong C.B.; Cuong N.V.; 2016, Pages 205-209
129 Design and implementation of a hybrid switching router for the reconfigurable network-on-chip

International Conference on Advanced Technologies for Communications

Tran X.-T.; Nguyen H.K.; 2016, Pages 328-333
130 An optimal mobile hardware design for Inter Motion Estimation in HEVC

Journal of Telecommunication, Electronic and Computer Engineering

Nguyen T.; Nguyen P.; Dinh C.; Pham C.; Nguyen T.; Volume 8, Issue 6, 2016, Pages 27-31
131 An efficient FPGA-based database processor for fast database analytics

Proceedings - IEEE International Symposium on Circuits and Systems

Pham C.-K.; Tominaga K.; Murayama T.; Shimojo O.; Inoue K.; Hoang T.-T.; Nguyen H.-T.; Nguyen X.-T.; Volume 2016-July, 2016, Pages 1758-1761
132 An efficient FPGA implementation of AES-CCM authenticated encryption IP core

NICS 2016 - Proceedings of 2016 3rd National Foundation for Science and Technology Development Conference on Information and Computer Science

Dao V.-L.; Hoang V.-P.; Phan T.-T.-D.; 2016, Pages 202-205
133 An anomaly-based intrusion detection architecture integrated on openflow switch

ACM International Conference Proceeding Series

Thinh T.N.; Bao H.; Van Thanh N.; 2016, Pages 96-100
134 An all-in-one debugger of 8-bit microcontroller with high transfer speed

IEEE Joint Conference - International Conference on IC Design and Technology, ICICDT 2016 and Solid State Systems Symposium, 4S 2016

Hoa H.X.; Cuong T.K.; Quoc N.P.; Nghi H.M.T.; Quang T.V.; Dang Linh D.H.; Quan N.H.; 2016,
135 A simple diagram for data transmission using Manchester code

International Conference on Advanced Technologies for Communications

Van Thanh P.; Vu T.A.; 2016, Pages 453-456
136 A reconfiguration solution for CMOS frequency synthesizers in cognitive radios

International Conference on Advanced Technologies for Communications

Phan M.H.; Dinh Tran L.; Tran H.V.; Le Vu H.; Volume 2016-January, 2016, Pages 428-433
137 A reconfigurable heterogeneous multicore architecture for DDoS protection

NICS 2016 - Proceedings of 2016 3rd National Foundation for Science and Technology Development Conference on Information and Computer Science

Thinh T.N.; Biet N.-H.; Cuong P.-Q.; 2016, Pages 189-194
138 A pipelined Schnorr-Euchner sphere decoder architecture for MIMO systems

International Conference on Advanced Technologies for Communications

Ngo V.-D.; Pham N.-N.; Le M.-T.; Nguyen X.-N.; Volume 2016-January, 2016, Pages 366-371
139 A parallel pipeline CORDIC based on adaptive angle selection

International Conference on Electronics, Information, and Communications, ICEIC 2016

Le D.-H.; Hoang T.-T.; Pham C.-K.; Nguyen X.-T.; Nguyen H.-T.; 2016,
140 A low-resource low-latency hybrid adaptive CORDIC in 180-nm CMOS technology

IEEE Region 10 Annual International Conference, Proceedings/TENCON

Le D.-H.; Hoang T.T.; Pham C.-K.; Nguyen X.T.; Nguyen H.-T.; Volume 2016-January, 2016,
141 A high throughput pipelined hardware architecture for tag sorting in packet fair queuing schedulers

2015 International Conference on Computing, Management and Telecommunications, ComManTel 2015

Huu T.N.; Ngoc N.P.; Kim S.N.; Thien V.T.; Van T.N.; 2016, Pages 41-45
142 RTL implementation for a specific ALU of the 32-bit VLIW DSP processor core

International Conference on Advanced Technologies for Communications

Bui T.-T.; Dang-Do Q.-M.; Dinh-Duc A.-V.; Le-Huu K.-N.; Volume 2015-February, 2015, Pages 387-392
143 A high-speed unsigned 32-bit multiplier based on booth-encoder and wallace-tree modifications

International Conference on Advanced Technologies for Communications

Dinh-Duc A.-V.; Bui T.-T.; Hoang T.-T.; Luu X.-V.; Volume 2015-February, 2015, Pages 739-744
144 A new power profiling method and power scaling mechanism for energy-aware NetFPGA gigabit router

Computer Networks

Schwartz C.; Tran-Gia P.; Truong Thu H.; Tran Hoang V.; Vu Quang T.; Nguyen Huu T.; Pham Ngoc N.; Volume 78, 2015, Pages 4-25
145 A Distributed Power Hardware-In-the-Loop Microgrid Simulator with Reduced-Voltage Components

Proceedings - ISSAT International Conference on Modeling of Complex Systems and Environments 2015

Nguyen H.; Tran T.; 2015, Pages 43-47
146 Development of gamma spectroscopy employing Nal(Tl) detector 3 inch × 3 inch and readout electronic of flash-ADC/FPGA-based technology

Kerntechnik

Khai B.T.; Hung N.Q.; Hai V.H.; Volume 80, Issue 2, 2015, Pages 180-183
147 Energy saving for OpenFlow switch on the NetFPGA platform based on queue engineering

SpringerPlus

Nam P.N.; Thanh N.H.; Quan N.T.; Luc V.C.; Vu T.H.; Volume 4, Issue 1, 2015,
148 A low-cost remote laboratory of field programmable gate arrays

Proceedings of 2015 12th International Conference on Remote Engineering and Virtual Instrumentation, REV 2015

Hoang T.M.; Quang H.N.; 2015, Pages 172-176
149 Walsh spectral techniques for logic synthesis FPGA

Advances in Electrical and Electronic Engineering

Nguyen N.K.H.; Volume 13, Issue 2, 2015, Pages 162-170
150 Design of co-processor for real-time HMM-based text-tospeech on hardware system applied to Vietnamese

IEICE Electronics Express

Pham C.-K.; Bui T.-T.; Huynh H.-T.; Le D.-H.; Nguyen H.-B.; Su H.-K.; Hoang T.-T.; Volume 12, Issue 14, 2015,
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