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A genetic algorithm-based on-orbit self-repair implementation for SRAM FPGAs

Zhang College of Aerospace Science and Engineering, National University of Defense Technology, Changsha, China|
Tri Gia (56883514900) | Qinqin (57705271600); Nguyen Information Technology, FPT University, Danang, Viet Nam| Shifeng (8413049700); Zeng Sci-Tech Management Department, China Construction Science & Technology Group Co., Ltd., Beijing, China| Chenguang (49861146400); Zhang School of Electronics and Information, Northwestern Polytechnical University, Shaanxi, China| Fan (57161228300); Guo Department of FPGA Design, Beijing Microelectronics Technology Institute, Beijing, China|

Expert Systems Số 10, năm 2022 (Tập 39, trang -)

ISSN: 2664720

ISSN: 2664720

DOI:

Tài liệu thuộc danh mục:

Article

English

Từ khóa: Aerospace industry; Binary sequences; Digital arithmetic; Field programmable gate arrays (FPGA); Integer programming; Learning algorithms; Machine learning; Orbits; Repair; Field programmables; Knowledge requirements; Machine-learning; On orbit; Probability functions; Programmable gate array; Repair methods; Self repair; Static random access memory; Static random-access memory field programmable gate array; Genetic algorithms
Tóm tắt tiếng anh
The reconfigurable capability of static random-access memory (SRAM) field programmable gate array (FPGA) can be used for its fault self-repair method. As a machine learning method, the genetic algorithm (GA) is an FPGA fault repair method that can be automatically executed on-orbit without any ground support. However, the GA-based fault repair method has disadvantages, such as the dependency on processors, the knowledge requirement for user designs in FPGAs, and the small size of repaired circuits. To address these issues, this paper presents a comprehensive analysis of the FPGA bitstream in the aerospace industry. An accurate on-orbit fault location can be identified by bitstream copying and exhaustive test and the executed area of the GA can be reduced to one tile. In addition, the probability function of the algorithm is optimized, which converts floating-point operations into integer arithmetic operations that are easily implemented in FPGAs without processors. The method is outstanding compared with existing ones, considering: (1) The size of repaired circuits is hundreds of times larger than those from other methods. (2) Its implementations are totally up to FPGAs' own logic, with no requirement for processors. (3) There is no knowledge requirement for user design. (4) It reaches the leading level with a success rate of 81%–93%. The method has been verified by various applications in XC7VX330T, which demonstrates its engineering practicability. © 2022 John Wiley & Sons Ltd.

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