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A novel multichannel UART design with FPGA-based implementation

Pham-Thai Department of Computer and Communication Engineering, Ho Chi Minh City University of Technology and Education, Thu Duc, Ho Chi Minh City, Viet Nam|
Van-Ca (57210577728) | Phuc Quang (57193645951); Phan | Tan (56512337600); Truong | Bao (57660810900); Do-Duy | Ngoc (57660496200); Ho-Ngoc |

International Journal of Computer Applications in Technology Số 4, năm 2021 (Tập 67, trang 358-369)

ISSN: 9528091

ISSN: 9528091

DOI: 10.1504/IJCAT.2021.122350

Tài liệu thuộc danh mục:

Article

English

Từ khóa: Buses; Integrated circuit design; Logic gates; System buses; Transmissions; Advanced peripheral bus; AMBA 3 advanced peripheral bus; Data bus; FPGA-based implementation; Multi channel; Receiver design; Serial communications; Test-bench; Transmitter design; Universal asynchronoi receiver and transmitter; Field programmable gate arrays (FPGA)
Tóm tắt tiếng anh
Universal Asynchronous Receiver and Transmitter (UART) is a popular asynchronous serial communication standard. Although the transmission speed is not too high, UART has the advantage of simplicity, it is easy to implement and has low power consumption. Therefore, UART is still used in various digital modules that do not require high communication speed, such as SIM module, Bluetooth, GPS, etc. However, communication with many low-speed peripherals can reduce the efficiency of data bus usage and processor's performance. In this paper, we propose a multichannel UART design to efficiently utilise the Advanced Peripheral Bus (APB) standard data bus in order to support simultaneously multiple transmission data frames with different rates. Then, we evaluate the performance of our multichannel UART design by means of simulations and practical implementation using Field-Programmable Gate Array boards. The evaluation results show that our proposed multichannel UART module ensures stable operation while guaranteeing proper transmission to/from multiple devices following UART standard with different configurations. Copyright � 2021 Inderscience Enterprises Ltd.

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