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A parallel pipeline CORDIC based on adaptive angle selection

Nguyen H.-T. University of Electro-Communiations, 1-5-1 Chofugaoka, Chofu, Tokyo, Japan|
Le D.-H. | Hoang T.-T. | Pham C.-K. | Nguyen X.-T. University of Science, 227 Nguyen Van Cu St., Ho Chi Minh City, Viet Nam|

International Conference on Electronics, Information, and Communications, ICEIC 2016 Số , năm 2016 (Tập , trang -)

ISSN: 123661

ISSN: 123661

DOI: 10.1109/ELINFOCOM.2016.7563034

Tài liệu thuộc danh mục: ISI, Scopus

Int. Conf. Electron., Inf., Commun., ICEIC

English

Từ khóa: Digital computers; Clock cycles; Co-ordinate rotation digital computers; CORDIC algorithms; Hardware architecture; Low latency; Root extraction; Trigonometric functions; Pipelines
Tóm tắt tiếng anh
Coordinate Rotation Digital Computer (CORDIC) was an efficient algorithm to compute elementary arithmetic such as multiplication, division, and root extractions. However, conventional CORDIC algorithm requires high latency to obtain the results. This paper proposes a low latency parallel pipeline CORDIC (PP-CORDIC) to calculate trigonometric functions. The results show that PP-CORDIC can operate at 83.64 MHz frequency with the latency was 10, 15, and 17 clock cycles in the best, average, and worst case, respectively. The hardware architecture occupies 7,035 LUTs, and 3,409 registers on Stratix IV FPGA. � 2016 IEEE.

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