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A trigonometric hardware acceleration in 32-bit RISC-V microcontroller with custom instruction
IEICE Electronics Express Số 16, năm 2021 (Tập 18, trang -)
ISSN: 13492543
ISSN: 13492543
DOI: 10.1587/ELEX.18.20210266
Tài liệu thuộc danh mục:
Article
English
Từ khóa: Logic Synthesis; Microcontrollers; Application specific; Custom instruction; Hardware acceleration; Instruction set; Integrated chips; Reduced instruction set computers; Field programmable gate arrays (FPGA)
Tóm tắt tiếng anh
This work presents a 32-bit Reduced Instruction Set Computer fifth-generation (RISC-V) microprocessor with a COordinate Rotation DIg- ital Computer (CORDIC) accelerator. The accelerator is implemented inside the core and being used by the software via custom instruction. The used microprocessor is the VexRiscv with the Instruction Set Archi- tecture (ISA) of RV32IM; that means 32-bit RISC-V including Integer and Multiplication. The experimental results were collected using Field- Programmable Gate Array (FPGA) on the DE2-115 development kit and Application Specific Integrated Chip (ASIC) synthesizer on 180-nmCMOS process library. � 2021 Institute of Electronics Information Communication Engineers. All rights reserved.
