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An FPGA-based implementation for repeated square-and-multiply polynomials

Nguyen H.T. Department of Electronic Engineering, PTIT University, Hanoi, Viet Nam|
Custovic E. | Nguyen C.L. Department of Electronic Engineering, Latrobe University, Melbourne, Australia| Nguyen M.N. Department of Telecommunication and Electronic Engineering, EPU University, Hanoi, Viet Nam|

IB2COM 2011 - 6th International Conference on Broadband Communications and Biomedical Applications, Program Số , năm 2011 (Tập , trang 173-178)

DOI: 10.1109/IB2Com.2011.6217915

Tài liệu thuộc danh mục: Scopus

Conference Paper

English

Từ khóa: Cyclic code; Exponentiations; FPGA-based implementation; General functions; Multiplicative groups; Polynomial rings; Algorithms; Field programmable gate arrays (FPGA); Medical applications; Telecommunication systems
Tóm tắt tiếng anh
This paper presents a novel FPGA based method to implement a repeated squared-and-multiply algorithm in polynomial rings. The repeated square-and-multiply algorithm for exponentiation is discussed and constructed for a general function f(x). From that, an algorithm to apply for f(x)=x n+1 is also constructed and described in this paper. Simulations and implementation results using an FPGA are provided and discussed. � 2011 IEEE.

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