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An optimal mobile hardware design for Inter Motion Estimation in HEVC
Journal of Telecommunication, Electronic and Computer Engineering Số 6, năm 2016 (Tập 8, trang 27-31)
ISSN: 21801843
ISSN: 21801843
DOI:
Tài liệu thuộc danh mục: Scopus
Article
English
Tóm tắt tiếng anh
This paper presents a hardware design for the Integer Motion Estimation (IME) compatible with the High Efficiency Video Coding (HEVC) standard. The hardware designed was tar-geted to meet 1080p@30fps real-time video coding. The architec-tures were described in Verilog HDL and synthesis on Xilinx Vir-tex VI. The proposed techniques significantly reduce the area and energy consumption of the proposed hardware on FPGA.
