LIÊN KẾT WEBSITE
Deep Learning Accelerator on FPGA Using Handwritten Digit Recognition for Example
2018 IEEE International Conference on Consumer Electronics-Taiwan, ICCE-TW 2018 Số , năm 2018 (Tập , trang -)
ISSN: 139107
ISSN: 139107
DOI: 10.1109/ICCE-China.2018.8448531
Tài liệu thuộc danh mục: Scopus
IEEE Int. Conf. Consum. Electron.-Taiwan, ICCE-TW
English
Từ khóa: Acceleration; Character recognition; Computer aided instruction; Field programmable gate arrays (FPGA); Neural networks; Smartphones; Accelerator architectures; Handwriting recognition; Handwritten digit recognition; Image data; IOT applications; Neuron networks; Off-chip; Deep learning
Tóm tắt tiếng anh
This paper presents an edge inference accelerator for deep learning application 'Handwriting recognition' using field programmable gate array (FPGA). The parameter of the neuron network is trained using GPU and then download to an off-chip DRAM for the accelerator to access. The image data is transfered through Bluetooth from smart phone to the deep learning accelerator. This accelerator architecture can fit any neuron network and is suitable for consumer electronics such as IoT applications. � 2018 IEEE.
