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Design and implementation of a SoPC system for speech recognition
Lecture Notes in Electrical Engineering Số , năm 2013 (Tập 240 LNEE, trang 1197-1203)
ISSN: 18761100
ISSN: 18761100
DOI: 10.1007/978-94-007-6738-6_147
Tài liệu thuộc danh mục: Scopus
Conference Paper
English
Từ khóa: Design and implementations; Mel-frequency cepstral coefficients; MFCC; Nios; SoPC; Speech recognition systems; System on programmable chips; VQ; Feature extraction; Field programmable gate arrays (FPGA); Vector quantization; Speech recognition
Tóm tắt tiếng anh
This paper presents the design of a System on Programmable Chip (SoPC) based on Field Programmable Gate Array (FPGA) for speech recognition in which Mel-Frequency Cepstral Coefficients (MFCC) for speech feature extraction and Vector Quantization (VQ) for recognition are used. The execution speed of the blocks in the speech recognition system is surveyed by calculating the number of clock cycles while executing each block. � 2013 Springer Science+Business Media Dordrecht(Outside the USA).
