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Design and implementation of configurable convolutional neural network on FPGA
Proceedings - 2019 6th NAFOSTED Conference on Information and Computer Science, NICS 2019 Số , năm 2019 (Tập , trang 298-302)
ISSN: 158383
ISSN: 158383
DOI: 10.1109/NICS48868.2019.9023810
Tài liệu thuộc danh mục: Scopus
Proc. - NAFOSTED Conf. Inf. Comput. Sci., NICS
English
Từ khóa: Convolution; Digital arithmetic; Field programmable gate arrays (FPGA); Image segmentation; Integrated circuit design; Object detection; Computer vision applications; Design and implementations; Evaluation board; MNIST; Number of layers; Reconfigurability; Single precision; Verilog HDL; Convolutional neural networks
Tóm tắt tiếng anh
Convolutional neural network (CNN) is successful in the Computer Vision applications such as object detection, image segmentation, image classification... Nowadays, most of the CNN applications are implemented on the server due to the large data inputting, which takes time for transferring data from clients to server and vice versa. In recent years, there has been an increasing interest in implementing CNN on Field-Programmable Gate Arrays (FPGA) due to its' high performance, low power usage, and reconfigurability. In this paper, we design a synthesizable HDL-based CNN Core Generator; and it can configure these parameters (input size, number of layers, filter size, number of classes). For the accuracy and minimizing the loss of calculating, our design bases on Single Precision Floating-Point Arithmetic. For verification, we create the HDL-based CNN module of 2 layers, and it is applied on MNIST dataset. On the other hand, we build the exact model on Keras framework, extract weights and load the weights to the CNN module; and then two results will be compared. The maximum error of the two results is 2.056360244750977x10-6. This design is synthesized on the Virtex-7 VC707 Evaluation Board (XC7VX485T-2). 2019 IEEE.