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Design and implementation of MIMO-STBC systems on FPGA hardware
International Conference on Advanced Technologies for Communications Số , năm 2012 (Tập , trang 274-277)
ISSN: 21621039
ISSN: 21621039
DOI: 10.1109/ATC.2012.6404275
Tài liệu thuộc danh mục: Scopus
Conference Paper
English
Từ khóa: BER performance; Design and implementations; FPGA hardwares; Hardware and software; Hardware design; High speed data rates; Multiple antenna; Multiple-input-multiple-output systems; Potential technologies; Receive antenna; Reliable transmission; STBC; Verilog HDL; Computer software; Digital signal processing; Field programmable gate arrays (FPGA); Hardware; Receiving antennas; Space-time block coding (STBC); MIMO systems
Tóm tắt tiếng anh
One potential technology to provide high speed data rate and reliable transmission for modern networks is multiple-input multiple-output (MIMO) systems, which are equipped multiple antennas at both the transmitters and receivers. The main purpose of this paper is to present our own design and implementation of MIMO Space-time block coding (STBC) systems with various number of transmit and receive antennas. They are implemented on FPGA Altera Stratix DSP Development KIT using Verilog HDL. BER performance of the systems with the different number of transmit and receive antennas is measured and compared in term of hardware and software simulation. � 2012 IEEE.
