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Designing a harware accelerator for face recognition using vector quantization and principal component analysis as a component of SoPC

Tran D. Faculty of Electronics and Telecommunications, University of Science, VNU-HCMC, 227 Nguyen Van Cu Street, District 5, HCM City, Viet Nam|
Nguyen P. | Huynh T. | To T. |

Proceedings - 5th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2010 Số , năm 2010 (Tập , trang 82-86)

DOI: 10.1109/DELTA.2010.56

Tài liệu thuộc danh mục: Scopus

Conference Paper

English

Từ khóa: Code-words; Codeword; DSP using FPGA; Embedded CPU; Full-search vector quantization; Hardware accelerator; Hardware accelerators; High-speed operation; Improved methods; Look up table; Pipeline architecture; Real-time application; Real-time image compression; Single instruction multiple data; Statistical analysis; System on a programmable chips; Two stage; Computer hardware; Computer vision; Data compression; Digital signal processors; Face recognition; Image analysis; Image compression; Principal component analysis; Vectors; Vector quantization
Tóm tắt tiếng anh
A flexible hardware accelerator for full-search vector quantization (VQ) has been developed as a component for a system on a programmable chip (SoPC) to use in realtime image compression and recognition applications. In the system, the number of elements for each codeword and the number of codewords in the system can be changed easily for different applications with the use of an embedded CPU. The architecture allows using look up tables (LUTs), single-instruction multiple data (SIMD) and two-stage pipeline architecture. This leads to high speed operation suitable for real-time applications. On the other hand, over the last ten years or so, face recognition has become a popular area of research in computer vision and one of the most successful applications of image analysis and understanding. A number of statistical analysis methods have showed their efficiencies in recognition applications. Thus, in this research, an improved method for face recognition using principal component analysis (PCA) and vector quantization (VQ) have been developed as a component of SoPC using a DSP FPGA Development Kit, Stratix II Edition from Altera. � 2010 IEEE.

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