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FPGA design and implementation of the detector for the MIMO-SDM system using PNC

Le D.-T. Hanoi University of Science and Technology, Viet Nam|
Ngo V.-D. | Le M.-T. Mobifone RandD Center, Viet Nam| Tran X.-N. Le Quy Don Technical University, Viet Nam| Vu D.-H. Telecommunications University, Viet Nam|

2016 IEEE 6th International Conference on Communications and Electronics, IEEE ICCE 2016 Số , năm 2016 (Tập , trang 205-210)

ISSN: 123684

ISSN: 123684

DOI: 10.1109/CCE.2016.7562637

Tài liệu thuộc danh mục: Scopus

IEEE Int. Conf. Commun. Electron., IEEE ICCE

English

Từ khóa: Complex networks; Data communication systems; Detectors; Field programmable gate arrays (FPGA); Integrated circuit design; Long Term Evolution (LTE); MIMO systems; Multiplexing; Network coding; Network layers; Reconfigurable hardware; Standards; Wireless networks; Wireless telecommunication systems; 3gpp long term evolutions; Design and implementations; High-speed data transmission; MMSE; Physical layer network coding (PNC); Potential technologies; Spatial Division Multiplexing; Wireless Internet networks; Space division multiple access
Tóm tắt tiếng anh
Multiple-input multiple-output (MIMO) systems using spatial division multiplexing (SDM) technique have been considered a potential technology for high speed data transmission wireless internet networks, such as IEEE 802.11, 3GPP Long Term Evolution, WiMAX,.. Meanwhile, physical layer network coding (PNC) is a promising technique to increase transmission throughput over bidirectional relay wireless networks. By using MIMO-SDM-PNC, multiplexing gain, spectral efficiency and transmission rates can be increased. But until now, there is no technical paper considering and evaluating the MIMO-SDM-PNC system based on hardware design. In this paper, we propose the design and implementation of two detector architectures at the destination node for MIMO-SDM-PNC system on FPGA. Based on the design, we consider the consumption of FPGA elements in our design and design's complexity. � 2016 IEEE.

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