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FPGA implementation of the synchronization for IEEE 802.11n WLAN systems
2014 IEEE 5th International Conference on Communications and Electronics, IEEE ICCE 2014 Số , năm 2014 (Tập , trang 280-284)
DOI: 10.1109/CCE.2014.6916715
Tài liệu thuộc danh mục: Scopus
Conference Paper
English
Từ khóa: Field programmable gate arrays (FPGA); Gain control; Hardware; Standards; Wireless local area networks (WLAN); Automatic gain control; Conventional methods; FPGA implementations; IEEE 802.11n; Mathematical expressions; Symbol timing synchronization; Timing synchronization; Wireless LAN system; Synchronization
Tóm tắt tiếng anh
Normally, a premable is used for the time synchronization for IEEE 802.11n Wireless LAN (WLAN) systems. However, the synchronization is often affected by the timing of the packet detection and automatic gain control completion (AGC). Therefore, it is invalid to assume that symbol timing synchronization starts at the beginning of the preambles in conventional methods. Moreover, most current timing synchronization methods estimate a coarse time-offset of legacy short training symbols (L-STSs) using complex mathematical expressions such as the cross-correlation or auto-correlation. Implementations of these methods, therefore, are complicated and require a lot of hardware. In order to solve the above problems, an effective symbol timing synchronization method is proposed. The new method can detect the start of frame correctly and can save hardware upto 90.5%, 70.6% and 72.4% compare to conventional and previously proposed methods. � 2014 IEEE.
