LIÊN KẾT WEBSITE
Hardware-Efficient Implementation of WFQ algorithm on NetFPGA-based OpenFlow Switch
International Conference on Advanced Technologies for Communications Số , năm 2016 (Tập , trang 431-436)
ISSN: 125210
ISSN: 125210
DOI: 10.1109/ATC.2016.7764821
Tài liệu thuộc danh mục: Scopus
Int. Conf. Adv. Technol. Commun.
English
Từ khóa: Field programmable gate arrays (FPGA); Efficient implementation; Network services; Openflow; Openflow switches; Quality of service (QoS) guarantees; Weighted fair queuing; Quality of service
Tóm tắt tiếng anh
The development of network services makes their requirements for bandwidth become higher and more various, which leads to difficulty in Quality of Service (QoS) guarantee. In this paper, an OpenFlow switch featuring Weighted Fair Queuing (WFQ) algorithm is proposed. The system is implemented into NetFPGA 1G board which utilizes Xilinx Virtex II Pro 50 technology. The results have shown that our circuit can deliver adequate level of QoS at a throughput of 8 Gbps in its current implementation. Due to the flexibility of the design, the WFQ circuit can be targeted for later technologies in order to provide higher throughput. � 2016 IEEE.
