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Hardware implementation of the efficient SOR-Based massive MIMO detection for uplink
RIVF 2019 - Proceedings: 2019 IEEE-RIVF International Conference on Computing and Communication Technologies Số , năm 2019 (Tập , trang -)
DOI: 10.1109/RIVF.2019.8713667
Tài liệu thuộc danh mục: ISI, Scopus
English
English
Từ khóa: Field programmable gate arrays (FPGA); Inverse problems; MIMO systems; Signal detection; Hardware architecture; Hardware implementations; Inverse matrix; MIMO detection; Minimum mean square errors (MMSE); Optimal results; Signal detection algorithm; Successive over relaxation; Mean square error
Tóm tắt tiếng anh
In Massive MIMO's uplink, the signal detection algorithms such as minimum mean square error (MMSE), zero-forcing (ZF) achieve nearly optimal result, but they use inverse matrix in design, the complexity in calculation is very large. In this paper, we propose an efficient algorithm based on the SOR (Successive over Relaxation) algorithm with the better performance than the conventional SOR-based algorithm. The obtained result shows that the performance of the efficient SOR-based algorithm is better than the conventional SOR-based algorithm and close to MMSE algorithm. Besides, we propose the hardware architecture for the proposed SOR-hased algorithm. � 2019 IEEE.
