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Implementing the on-chip backpropagation learning algorithm on FPGA architecture
Proceedings - 2017 International Conference on System Science and Engineering, ICSSE 2017 Số , năm 2017 (Tập , trang 538-541)
DOI: 10.1109/ICSSE.2017.8030932
Tài liệu thuộc danh mục: Scopus
Conference Paper
English
Từ khóa: Application specific integrated circuits; Backpropagation; Backpropagation algorithms; Field programmable gate arrays (FPGA); MATLAB; Multilayers; Network architecture; Neural networks; Backpropagation learning algorithm; Complex applications; Hardware architecture; Integrated circuit technology; Learning rules; Multi-layer perception; Neural network model; Processing performance; Learning algorithms
Tóm tắt tiếng anh
Scaling CMOS integrated circuit technology leads to decrease the chip price and increase processing performance in complex applications with re-configurability. Thus, VLSI architecture is a promising candidate in implementing neural network models nowadays. Backpropagation algorithm is used for training multilayer perceptron with high degree of parallel processing. Parallel computing implementation is the best suitable on FPGA or ASIC. The on-chip back-propagation learning algorithm design is proposed to implement 2�2�1 neural network architecture on FPGA. The simulation results show that back-propagation learning algorithm is converged in 3 epochs with error target as small as 0.05. The updated weighting also makes comparison between learning on FPGA and Matlab less than 2%. The achievements extend the applications with larger neural networks to communicate with other hardware architecture. � 2017 IEEE.
