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Improved detection metric and oversampling-based frame detector for DSRC receiver

Li X. School of Electronics and Information Engineering, Tongji University, Shanghai, 201804, China|
Van Nguyen N. | Liu F. School of Electronics and Telecommunications, Hanoi University of Science and Technology, Hanoi, Viet Nam|

Journal of Engineering Science and Technology Review Số 2, năm 2016 (Tập 9, trang 146-153)

ISSN: 17912377

ISSN: 17912377

DOI: 10.25103/jestr.092.23

Tài liệu thuộc danh mục: Scopus

Article

English

Từ khóa: Field programmable gate arrays (FPGA); Intelligent vehicle highway systems; Signal detection; Signal interference; Signal receivers; Signal to noise ratio; Frame detection; Hardware implementations; Inter-vehicle communication systems; Over sampling; Probability of false alarm; Signal to interference plus noise ratio; Vehicular communications; Wireless receivers; Dedicated short range communications
Tóm tắt tiếng anh
In inter-vehicle communication systems based on dedicated short-range communications (DSRC), frame detection is essential for the correct demodulation of a received frame. Owing to the fast mobility of vehicles and the relatively high radio frequency carrying DSRC signals, the frame detection reliability suffers from low signal-to-interference-plus-noise ratio (SINR) and time-varying noise and interference. To address this issue, this study proposed a new detection method to improve the reliability of DSRC receivers in highly dynamic outdoor environments. Specifically, a novel detection metric based on autocorrelation was first proposed to achieve a low and stable probability of false alarm (PFA). Then, the oversampling technique was employed to improve the detection probability (PD) in low-SINR regimes. Finally, a reference design was also presented on a field-programmable gate array (FPGA) for the proposed scheme. Simulation results demonstrated that both low PFA and high PD can be achieved simultaneously in vehicular communications by using the proposed method. Results given by the hardware implementation based on FPGA agree that the feasibility and complexity of our method is acceptable. � 2016 Eastern Macedonia and Thrace Institute of Technology.

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