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Low area PRESENT cryptography in FPGA using TRNG-PRNG key generation

Kowsalya Department of Electronic and Communication Engineering, Muthayammal Engineering College, Rasipuram, Namakkal, Tamilnadu, India|
Raja Majid (56419639200) | Anand (55201442200); Mehmood Department of Information and Communication Technology, School of Electrical and Computer Engineering, Xiamen University Malaysia, Sepang, 43900, Malaysia| B.D. (55342182200); Nayyar Faculty of Information Technology, Graduate School, Duy Tan University, Da Nang, 550000, Viet Nam| R. (57191333364); Parameshachari Department of Telecommunication Engineering, GSSS Institute of Engineering and Technology for Women, Mysuru, India| T. (55348702300); Ganesh Babu Department of Electronics and Communication Engineering, SRMTRP Engineering College, Tiruchirappalli, Tamilnadu, India|

Computers, Materials and Continua Số 2, năm 2021 (Tập 68, trang 1447-1465)

ISSN: 15462218

ISSN: 15462218

DOI: 10.32604/cmc.2021.014606

Tài liệu thuộc danh mục:

Article

English

Từ khóa: Cryptography; Field programmable gate arrays (FPGA); Flip flop circuits; Hardware security; Mean square error; Network security; Number theory; Personal computing; Signal to noise ratio; Table lookup; High power consumption; Light-weight cryptography; Lightweight block ciphers; Peak signal to noise ratio; Pseudo random number generators; Retrieval performance; Sensitive application; Structural similarity indices (SSIM); Random number generation
Tóm tắt tiếng anh
Lightweight Cryptography (LWC) iswidely used to provide integrity, secrecy and authentication for the sensitive applications. However, the LWC is vulnerable to various constraints such as high-power consumption, time consumption, and hardware utilization and susceptible to the malicious attackers. In order to overcome this, a lightweight block cipher namely PRESENT architecture is proposed to provide the security against malicious attacks. The True Random Number Generator-Pseudo Random Number Generator (TRNG-PRNG) based key generation is proposed to generate the unpredictable keys, being highly difficult to predict by the hackers. Moreover, the hardware utilization of PRESENT architecture is optimized using the Dual port Read Only Memory (DROM). The proposed PRESENT-TRNGPRNG architecture supports the 64-bit input with 80-bit of key value. The performance of the PRESENT-TRNG-PRNG architecture is evaluated by means of number of slice registers, flip flops, number of slices Look Up Table (LUT), number of logical elements, slices, bonded input/output block (IOB), frequency, power and delay. The input retrieval performances analyzed in this PRESENT-TRNG-PRNG architecture are Peak Signal to Noise Ratio (PSNR), Structural Similarity Index (SSIM) and Mean-Square Error (MSE). The PRESENT-TRNG-PRNG architecture is compared with three different existing PRESENT architectures such as PRESENT On-The- Fly (PERSENT-OTF), PRESENT Self-Test Structure (PRESENT-STS) and PRESENT-Round Keys (PRESENT-RK). The operating frequency of the PRESENT-TRNG-PRNG is 612.208 MHz for Virtex 5, which is high as compared to the PRESENT-RK. � 2021 Tech Science Press. All rights reserved.

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