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Parallel Random Access Memory in a shared memory architecture
2014 IEEE 5th International Conference on Communications and Electronics, IEEE ICCE 2014 Số , năm 2014 (Tập , trang 364-369)
DOI: 10.1109/CCE.2014.6916731
Tài liệu thuộc danh mục: Scopus
Conference Paper
English
Từ khóa: Computer hardware description languages; Memory architecture; Parallel architectures; Storms; Computing performance; Concurrent access; Cyclone II FPGA; Memory component; Multiple processors; Parallel memory; Parallel random access memory; Shared memory architecture; Random access storage
Tóm tắt tiếng anh
Parallel algorithms can significantly speed up computing performance. However, parallel architecture often needs shared-memories for concurrent access. Conventionally, parallel memories are constructed as space-multiplexed memories with many memory chips connected in parallel. This architecture normally requires a large number of interconnects with potentially large routing delay and consumes massive area. This proposal develops a new memory component called Parallel Random Access Memory (P-RAM) with four identical parallel ports. This component is designed using VHDL hardware description language and emulated on Cyclone II FPGA. The P-RAM is not a conventional RAM memory since its four ports can be read and write concurrently. It can be used for many purposes such as shared memory for multiple processors in a parallel model. � 2014 IEEE.
