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Power gating technique in pacemaker design on FPGA
International Conference on Advanced Technologies for Communications Số , năm 2012 (Tập , trang 14-18)
ISSN: 21621039
ISSN: 21621039
DOI: 10.1109/ATC.2012.6404219
Tài liệu thuộc danh mục: Scopus
Conference Paper
English
Từ khóa: Combinational functions; Logic elements; Low-power design; Normal structure; Novel structures; Power gatings; Power reductions; Electric power supplies to apparatus; Field programmable gate arrays (FPGA); Pacemakers; Costs
Tóm tắt tiếng anh
This study presents power gating techniques to reduce the power consumption in pacemaker device. A novel structure based on power technique in pacemaker device is presented. Experimental results in power reduction and cost overhead by using proposed structure are given. The result in saving power consumption-up to 25%- would be promising because the structure could last usage time of pacemaker device longer than normal structure. However, the cost overhead appears but is smaller than 0.65% in indicators of logic element, combinational function, and logic register. 2012 IEEE.