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Synchronization algorithm and FPGA implementation for Transmit-Reference UWB receiver
2012 4th International Conference on Communications and Electronics, ICCE 2012 Số , năm 2012 (Tập , trang 506-511)
DOI: 10.1109/CCE.2012.6315958
Tài liệu thuộc danh mục: Scopus
Conference Paper
English
Từ khóa: FPGA implementations; Model-based design; Sampling rates; Simulink models; Sliding Window; Synchronization algorithm; Transmit references; TRansmitted reference; UWB receivers; Algorithms; Computer hardware description languages; Quantization (signal); Radio receivers; Signal to noise ratio; Synchronization; Ultra-wideband (UWB)
Tóm tắt tiếng anh
This paper proposes a practical synchronization algorithm for Transmit-Reference UWB receiver which uses sliding window and supports flexible sampling rates. Additionally, a Simulink model and implementation of synchronization algorithm in receiver by hardware description language (HDL) is also developed using model-based design. Finally, we assess impact of signal-noise-rate (SNR), number of bits quantization and sampling rate on bit-error-rate (BER). � 2012 IEEE.
