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	Tên công bố	Tác giả	Năm xuất bản
61	A Generalized space vector modulation for cascaded h-bridge multi-level inverter Proceedings of 2019 International Conference on System Science and Engineering, ICSSE 2019	Van L.N.; Cong S.P.; Trong M.T.; Hoang P.V.; Xuan T.N.; Van C.M.;	2019, Pages 18-24
62	Design and Implementation of Signal Processing Unit for Two-Way Relay Node in MIMO-SDM-PNC System 2019 26th International Conference on Telecommunications, ICT 2019	Le M.-T.; Tran X.-N.; Ngo V.-D.; Nguyen M.-T.;	2019, Pages 142-148
63	A novel priority-driven arbiter for the router in reconfigurable Network-on-Chips ICICDT 2018 - International Conference on IC Design and Technology, Proceedings	Tran X.-T.; Nguyen H.K.;	2018, Pages 25-28
64	A Scalable FPGA-based Floating-Point Gaussian Filtering Architecture Proceedings - 2017 International Conference on Advanced Computing and Applications, ACOMP 2017	Thinh T.N.; Tran-Thanh B.; Pham-Quoc C.;	2018, Pages 111-116
65	MAC SoC hardware implementation for fast industrial WLAN communication systems Proceedings - 2018 2nd International Conference on Recent Advances in Signal Processing, Telecommunications and Computing, SIGTELCOM 2018	Khai L.D.; Thien B.T.; Luan P.H.;	Volume 2018-January, 2018, Pages 214-218
66	Hardware Implementation of Background Calibration Technique for TIADCs with Signals in Any Nyquist Bands Proceedings - IEEE International Symposium on Circuits and Systems	Pham C.-K.; Nguyen D.-M.; Hoang V.-P.; Le Duc H.;	Volume 2018-May, 2018,
67	High-speed 8/16/32-point DCT Architecture Using Fixed-rotation Adaptive CORDIC Proceedings - IEEE International Symposium on Circuits and Systems	Le D.-H.; Pham C.-K.; Hoang T.-T.;	Volume 2018-May, 2018,
68	A new nonlinear oscillator with infinite number of coexisting hidden and self-excited attractors Chinese Physics B	Tian Y.; Jafari S.; Pham V.-T.; Rajagopal K.; Jalil Khalaf A.; Tang Y.-X.;	Volume 27, Issue 4, 2018,
69	Complete dynamical analysis of a neuron under magnetic flow effect Chinese Journal of Physics	Alsaadi F.E.; Pham V.T.; Rajagopal K.; Khalaf A.J.M.; Jafari S.; Panahi S.;	Volume 56, Issue 5, 2018, Pages 2254-2264
70	Autonomous jerk oscillator with cosine hyperbolic nonlinearity: Analysis, FPGA implementation, and synchronization Advances in Mathematical Physics	Pham V.-T.; Kamdoum Tamba V.; Fautso Kuiate G.; Takougang Kingni S.; Rajagopal K.;	Volume 2018, 2018,
71	Hardware design and optimization of multimode pipeline based FFT for IEEE 802.11ax WLAN Devices 2018 IEEE 7th International Conference on Communications and Electronics, ICCE 2018	Ochi H.; Nguyen M.D.; Lanante L.; Duong C.M.; Tran H.V.; Dinh L.T.T.; Dinh P.T.K.;	2018, Pages 175-178
72	A new 4D chaotic system with hidden attractor and its engineering applications: Analog circuit design and field programmable gate array implementation Pramana - Journal of Physics	Jafari S.; Pham V.-T.; Rajagopal K.; Panahi S.; Khalaf A.J.M.; Abdolmohammadi H.R.;	Volume 90, Issue 6, 2018,
73	Implementation of a short word length ternary FIR filter in both FPGA and ASIC Proceedings - 2018 2nd International Conference on Recent Advances in Signal Processing, Telecommunications and Computing, SIGTELCOM 2018	Ho A.-V.; Tran L.D.; Chiem Q.T.; Hoang B.X.; Pham T.C.;	Volume 2018-January, 2018, Pages 45-50
74	Performance enhancement of encryption and authentication IP cores for IPSec based on multiple-core architecture and dynamic partial reconfiguration on FPGA Proceedings - 2018 2nd International Conference on Recent Advances in Signal Processing, Telecommunications and Computing, SIGTELCOM 2018	Dang T.-H.; Luong Q.-Y.H.; Huynh T.V.; Nguyen V.-C.; Nguyen T.-T.;	Volume 2018-January, 2018, Pages 126-131
75	BKVex: An Adaptable VLIW Processor and Design Framework for Reconfigurable Computing Platforms Proceedings - 2017 International Conference on Advanced Computing and Applications, ACOMP 2017	Dinh-Duc A.-V.; Kieu-Do-Nguyen B.; Pham-Quoc C.;	2018, Pages 39-46
76	A Configurable High-Frequency SSB Signal Generation Method using SDR Approach Implemented on System-on-Chip FPGA 2018 International Conference on Computer Engineering, Network and Intelligent Multimedia, CENIM 2018 - Proceeding	Trung H.D.; Tuan D.T.;	2018, Pages 60-65
77	Enhancing fixed-point control robustness for experimental non-contact scans with the Transverse-dynamic Force Microscope Proceedings of the American Control Conference	Miles M.; Nguyen T.; Burgess S.C.; Edwards C.; Antognozzi M.; Herrmann G.; Hatano T.; Zhang K.;	Volume 2018-June, 2018, Pages 4342-4347
78	Deep Learning Accelerator on FPGA Using Handwritten Digit Recognition for Example 2018 IEEE International Conference on Consumer Electronics-Taiwan, ICCE-TW 2018	Chou C.-H.; Dat H.B.; Tho P.H.; Phat V.T.;	2018,
79	Real-Time Lossless Compression of Waveforms Using an FPGA IEEE Transactions on Nuclear Science	Yamamoto K.; Teshima N.; Seiya Y.; Natori H.; Nakatsugawa Y.; Nagao D.; Ito S.; Saito M.; Igarashi Y.; Aoki M.; Truong N.M.;	Volume 65, Issue 9, 2018, Pages 2650-2656
80	A customized hardware architecture for multi-layer artificial neural networks on FPGA Advances in Intelligent Systems and Computing	Thang H.V.; Vu H.M.;	Volume 672, 2018, Pages 637-644
81	Design and implementation of IP core for contourlet-based image compression Journal of Telecommunication, Electronic and Computer Engineering	Vinh T.Q.;	Volume 10, Issue 08-Feb, 2018, Pages 77-82
82	An Efficient High-Throughput and Low-Latency SYN Flood Defender for High-Speed Networks Security and Communication Networks	Ngoc Thinh T.; Pham-Quoc C.; Ngo D.-M.;	Volume 2018, 2018,
83	Self Clock-Gating Scheme for Low Power Basic Logic Element Architecture Wireless Personal Communications	Amiri I.S.; Maheswar R.; Vigneswaran D.; Sundararajan T.V.P.; Joseph S.; Udaiyakumar R.;	Volume 102, Issue 4, 2018, Pages 3477-3488
84	Simplified cerebellum-like spiking neural network as short-range timing function for the talking robot Connection Science	Sawada H.; Thanh V.N.;	Volume 30, Issue 4, 2018, Pages 388-408
85	Application of Multi Layer (Perceptron) Artificial Neural Network in the Diagnosis System: A Systematic Review Proceedings of the 2018 3rd IEEE International Conference on Research in Intelligent and Computing in Engineering, RICE 2018	Bahuguna H.; Bijalwan A.; Rawat A.S.; Rana A.;	2018,
86	VLSI design of floating-point twiddle factor using adaptive CORDIC on various iteration limitations Proceedings - 2018 IEEE 12th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2018	Pham C.-K.; Le D.-H.; Hoang T.-T.;	2018, Pages 225-232
87	Stream-Based ORB Feature Extractor with Dynamic Power Optimization Proceedings - 2018 International Conference on Field-Programmable Technology, FPT 2018	Jasani B.A.; Wu M.; Lam S.K.; Pham T.H.; Tran P.;	2018, Pages 97-104
88	High Throughput and Low Cost Memory Architecture for Full Search Integer Motion Estimation in HEVC International Conference on Advanced Technologies for Communications	Nam Dinh V.; Thang N.V.;	Volume 2018-October, 2018, Pages 174-178
89	The Merged Clock Gating Architecture for Low Power Digital Clock Application on FPGA International Conference on Advanced Technologies for Communications	Vo M.H.;	Volume 2018-October, 2018, Pages 282-286
90	ODL-ANTIFLOOD: A Comprehensive Solution for Securing OpenDayLight Controller Proceedings - 2018 International Conference on Advanced Computing and Applications, ACOMP 2018	Tran M.A.T.; Le T.L.; Tran N.T.;	2018, Pages 14-21

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